Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications

Publications

Share / Export Citation / Email / Print / Text size:

International Journal on Smart Sensing and Intelligent Systems

Professor Subhas Chandra Mukhopadhyay

Exeley Inc. (New York)

Subject: Computational Science & Engineering , Engineering, Electrical & Electronic

GET ALERTS

eISSN: 1178-5608

DESCRIPTION

0
Reader(s)
0
Visit(s)
0
Comment(s)
0
Share(s)

VOLUME 7 , ISSUE 5 (December 2014) > List of articles

Special issue ICST 2014

Secure Hash Algorithm-3(SHA-3) implementation on Xilinx FPGAs, Suitable for IoT Applications

Muzaffar Rao / Thomas Newe / Ian Grout

Keywords : FPGA, IoT, SHA-3, Data Integrity

Citation Information : International Journal on Smart Sensing and Intelligent Systems. Volume 7, Issue 5, Pages 1-6, DOI: https://doi.org/10.21307/ijssis-2019-018

License : (CC BY-NC-ND 4.0)

Published Online: 15-February-2020

ARTICLE

ABSTRACT

Data integrity is a term used when referring to the accuracy and reliability of data. It ensures that data is not altered during operations, such as transfer, storage, or retrieval. Any changes to the data for example malicious intention, unpredicted hardware failure or human error would results in failure of data integrity. Cryptographic hash functions are generally used for the verification of data integrity. For many Internet of Things (IoT) applications, hardware implementations of cryptographic hash functions are needed to provide near real time data integrity checking. The IoT is a world where billions of objects can sense, share information and communicate over interconnected public or private Internet Protocol (IP) networks. This paper provides an implementation of a newly selected cryptographic hash algorithm called Secure Hash Algorithm – 3 (SHA-3) on Xilinx FPGAs (Spartan, Virtex, Kintex and Artix) and also provides the power analysis of the implemented design. An FPGA is the best leading platform of the modern era in terms of flexibility, reliability and re-configurability. In this implementation the core functionality of SHA-3 is implemented using LUT-6 primitives and then these primitives are instantiated for the complete implementation of SHA-3. The Xilinx Xpower tool is used for power analysis of the implemented design. This implementation can be used with IoT applications to provide near real time data integrity checks.

Content not available PDF Share

FIGURES & TABLES

REFERENCES

 [1] Xiaoyun Wang, X.L., Feng, D., Yu, H.: Collisions for hash functions MD4, MD5,HAVAL-128 and RIPEMD. Cryptology ePrint Archive, Report 2004/199, pp. 1–4 (2004), http: // eprint.iacr.org/2004/ 199
 
[2] Szydlo, M.: SHA-1 collisions can be found in 263 operations. Crypto BytesTechnical Newsletter (2005)
 
[3] Stevens, M.: Fast collision attack on MD5. ePrint-2006-104, pp. 1–13 (2006), http: //eprint.iacr.org/2006/104.pdf
 
[4] Federal Register / Vol. 72, No. 212 / Friday, November 2 (2007), Notices, http: // csrc.nist.gov/groups/ST/hash/documents/FR_Notice_ Nov07.pdf
 
[5] National Institute of Standards and Technology (NIST).SHA-3 Winner announcement, http : // w w w. nis .gov / itl / csd / sha-100212.cfm
 
[6] F. Henriquez, N. Saqib, D. Prez, and C. Kaya Koc; “Cryptographic Algorithms on Reconfigurable Hardware” Springer, November 2006.
 
[7] Kuon, I.; Tessier, R.; Rose, J. FPGA Architecture: Survey and  Challenges.  Found.  Trends Electron. Des. Autom. 2007, 2, 135–253.
 
[8] Xilinx 7 Series Overview; Datasheet DS180; Xilinx. Available online: http: // w w w. xilinx. Com / support / documentation / datasheets / ds1807 Series Overview.pdf.
 
[9] G. Bertoni, J. Daemen, M. Peeters, G. Assche “The Keccak SHA-3 Submission version 3” pp. 1-14, (2011), http : // Keccak . noekeon . org / Keccak – reference -3.0.pdf  
 
[10]  “XPower Tutorial FPGA Design”, [online]. Available at: ftp.xilinx. com/pub/documentation/tutorials/xpowerfpgatutorial.pdf

EXTRA FILES

COMMENTS