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VOLUME 7 , ISSUE 5 (December 2014) > List of articles
Special issue ICST 2014
Citation Information : International Journal on Smart Sensing and Intelligent Systems. Volume 7, Issue 5, Pages 1-7, DOI: https://doi.org/10.21307/ijssis-2019-034
License : (CC BY-NC-ND 4.0)
Published Online: 15-February-2020
In order to achieve the high-processing performance required in typical computationally intensive high-sample rate monitoring applications, a Field Programmable Gate Array (FPGA) is often used as a hardware accelerator. Given the design complexity, increased power consumption and additional cost of an FPGA, it is desirable to determine the sampling rates for which the use of an FPGA as hardware accelerator results in most effective solution. For this purpose, a computationally intensive application is realized on an FPGA based architecture so as to determine the sampling rates for which it achieves the highest performance and consumes the least amount of energy as compared to that of a micro-controller based architecture. Based on the measured performance and energy consumption for a computationally intensive application, tri-axes/threechannel vibration based condition monitoring, the results suggest that the FPGA based architecture is the most appropriate solution for sampling frequencies of 4 kHz and above.
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