Article | 01-April-2018
This paper presents a fast CCD optical spectrum data acquisition method based on FPGA, FIFO and DSP. Introduces a linear CCD timing sequence control signal generation and high speed ADC interface with FIFO and DSP in detail, publishes this design key parts FPGA logic schematic and VHDL source code, provides a general solution for universal high speed CCD optical spectrum data acquisition and analysis system.
Liqun Xu,
Gong Jiaming
International Journal of Advanced Network, Monitoring and Controls, Volume 1 , ISSUE 1, –
Article | 02-November-2017
This paper presents the algorithm on the compensator design for eliminating the nonlinearity in the capacitive pick-off MEMS open-loop accelerometer and its implementation in the FPGA. A simple and elegant method is presented for the purpose. In the sensor model of compensator, upto 3rd order terms are taken. The first step approximation is derived using linear model. This approximation is improved over iterations to reduce the non-linearity. With this method, the inertial navigational grade
Thampi Paul,
S.Vijin Jenius,
M. Sasi Kumar
International Journal on Smart Sensing and Intelligent Systems, Volume 2 , ISSUE 2, 213–228
Research Article | 15-February-2020
In order to achieve the high-processing performance required in typical computationally intensive high-sample rate monitoring applications, a Field Programmable Gate Array (FPGA) is often used as a hardware accelerator. Given the design complexity, increased power consumption and additional cost of an FPGA, it is desirable to determine the sampling rates for which the use of an FPGA as hardware accelerator results in most effective solution. For this purpose, a computationally
Khurram Shahzad,
Bengt Oelmann
International Journal on Smart Sensing and Intelligent Systems, Volume 7 , ISSUE 5, 1–7
Research Article | 12-December-2017
An efficient simplification procedure of the optical flow (OF) algorithm as well as its hardware implementation using the field programmable gate array (FPGA) technology is presented. The modified algorithm is based on block matching of subsets of successive frames, and exploits one-dimensional representation of subsets as well as the adaptive adjustments of their sizes. Also, an l1-norm-based correlation function requiring no multiplication/division operations is used. As a result, it was
Robert Piotrowski,
Stanislaw Szczepanski,
Slawomir Koziel
International Journal on Smart Sensing and Intelligent Systems, Volume 3 , ISSUE 2, 253–272
Research Article | 04-December-2011
Controlling of vibration in any system is very challenging problem. In the present work design, fabrication and testing of a variable mass 2-DoF system was presented. The system has been designed to be used as tool to demonstrate the capability of mass variable tuned vibration damper for wide frequency application. All valves and pumps were controlled by a cRIO with onboard FPGA. cRIO with FPGA enable the designer to implement different control algorithms that can be used for real time wide
Mayand Pratap Singh,
Prashant Kumar Tripathi,
K.V Gangadharan
International Journal on Smart Sensing and Intelligent Systems, Volume 4 , ISSUE 4, 698–709
Article | 05-September-2013
, and realizing it by hardware. This paper will introduce the implementation of the common low-level image processing algorithm in the FPGA, including color space convert module , edge extraction algorithms module , Hough transform module .The results of the experiment indicate that to realize the large amount of calculation of image processing by FPGA hardware logic, not only improves the effect of image processing, but also has high real-time!
Yang Yongjin,
Zhou Xinmei,
Xiang Zhongfan
International Journal on Smart Sensing and Intelligent Systems, Volume 6 , ISSUE 4, 1499–1515
Research paper | 02-November-2017
The paper describes the development of an FPGA based fuzzy processing system for pulmonary spirometry applications predicting the approaching obstructive or restrictive pulmonary disorder of the patient before criticality actually occurs. The system employs a smart agent that accepts the Peak Expiratory Flow Rate (PEFR), Forced Expiratory Volume in 1 second (FEV1) and Forced Vital Capacity (FVC) data of patients. In order to speed up the computation process, hybrid parallel data processing
Shubhajit Roy Chowdhury,
Dipankar Chakrabarti,
Hiranmay Saha
International Journal on Smart Sensing and Intelligent Systems, Volume 1 , ISSUE 4, 985–1018
Article | 03-November-2017
The paper presents a Field Programmable Gate Array (FPGA) based tracker to accurately track the maximum power point (MPP) of a photovoltaic (PV) array. The tracking logic realized on FPGA is based on a modified version of Adaptive Perceptive Particle Swarm Optimization (APPSO) technique. Photovoltaic generation systems use MPP tracker because the photovoltaic array exhibits multiple maxima in the power voltage characteristic under partially shaded conditions. Compared to PSO, the APPSO offers
Shubhajit Roy Chowdhury,
Dipankar Mukherjee,
Hiranmay Saha
International Journal on Smart Sensing and Intelligent Systems, Volume 2 , ISSUE 4, 661–675
Article | 01-September-2012
In this paper, Real-Time embedded control is designed via LabVIEW software for swinging-up a pendulum from its pending position to its upright position. Since the pendulum system has a typical nonlinear instable model, the control problem is achieved using the Astrom-Furuta energy control strategy. To overcome the complexities for the design and the real-Time implementation of the controller of the nonlinear system, FPGA and Real-Time Modules of LabVIEW software are used. A validation test is
Wael Benrejeb,
Olfa Boubaker
International Journal on Smart Sensing and Intelligent Systems, Volume 5 , ISSUE 3, 576–591
Research Article | 13-December-2017
each taken measurement. The hardware/software implementation of the system was carried out in an embedded configuration based on a FPGA platform. The obtained results highlight adaptability of the proposed calibration method at various sensors kinds as well as the implementation simplicity, and shows how the measuring accuracy can be considerably improved.
M. NADI,
C. MARGO,
M. KOUIDER,
J. PRADO,
D. KOURTICHE
International Journal on Smart Sensing and Intelligent Systems, Volume 1 , ISSUE 1, 21–33
Research Article | 01-September-2017
of Virtex4 family. Implementation was done for both signed and unsigned number systems, having bit width of operands vary as an exponential function of , where =2 to 5. Performance parameters have been calculated in terms of clock frequency, FPGA slice utilization, latency and power consumption. Implementation results indicate that multiplicative based algorithm is superior in terms of latency, while digit recurrence algorithms are consuming low power along-with less area overhead.
D. Kumar,
P. Saha,
A. Dandapat
International Journal on Smart Sensing and Intelligent Systems, Volume 10 , ISSUE 3, 630–645
research-article | 30-November-2018
smart Tele-ECG system has been developed. The main purposes of the system are early detection of heart diseases and heart monitoring. Several works have been conducted on telehealth systems (Sudhamony et al., 2008; Hababeh et al., 2015). The architecture of the system is shown in Figure 21. The system is comprised of four components: the ECG sensor, smartphones, FPGA, and the server. The first component, the sensor, is used to acquire heartbeat signal from patient’s body. The transducer, a component
Wisnu Jatmiko,
M. Anwar Ma’sum,
Hanif Arief Wisesa,
Hadaiq Rolis Sanabila
International Journal on Smart Sensing and Intelligent Systems, Volume 12 , ISSUE 1, 1–28
Article | 01-September-2012
changes. In this paper comparative analysis of both the algorithms being implemented on FPGA is presented. Experiments have been performed under optimal conditions as well as under cloudy conditions i.e. falling irradiance levels. Using the linear kalman filter the maximum power point of a solar PV array has been tracked with an efficiency of 97.11% while using the unscented kalman filter technique the maximum power point of the same solar PV array is tracked with higher efficiency of 98.3%. However
Varun Ramchandani,
Kranthi Pamarthi,
Shubhajit Roy Chowdhury
International Journal on Smart Sensing and Intelligent Systems, Volume 5 , ISSUE 3, 701–716
Research Article | 15-February-2020
cryptographic hash functions are needed to provide near real time data integrity checking. The IoT is a world where billions of objects can sense, share information and communicate over interconnected public or private Internet Protocol (IP) networks. This paper provides an implementation of a newly selected cryptographic hash algorithm called Secure Hash Algorithm – 3 (SHA-3) on Xilinx FPGAs (Spartan, Virtex, Kintex and Artix) and also provides the power analysis of the implemented design. An FPGA is
Muzaffar Rao,
Thomas Newe,
Ian Grout
International Journal on Smart Sensing and Intelligent Systems, Volume 7 , ISSUE 5, 1–6
Article | 30-November-2018
as field programmable gate array (FPGA) and application specific integrated circuits (ASIC). Therefore, considerable number of embedded coprocessors design were used to replace software based (i.e. programming based) solutions of different applications such as image processors, cryptographic processors, digital filters, low power application such as [3] and others. The major part of designing such processors significantly encompasses the use computer arithmetic techniques in the underlying layers
Mohammad M. Asad,
Ibrahim Marouf,
Qasem Abu Al-Haija
International Journal of Advanced Network, Monitoring and Controls, Volume 4 , ISSUE 2, 15–27
research-article | 30-November-2018
-Haija et al., 2018a).
In this paper, we are proposing a lightweight parallelized architecture of 128-bit SSC Cryptosystem for wireless sensor communications. To verify the proposed architecture, we have implemented the proposed crypto algorithm using VHDL (LaMeres, 2017) to describe the compressor on the Altera Cyclone IV FPGA chip family (Altera Corporation, 2012a). The completed design of SSC composes several design modules including the random number generation (Tian et al., 2009; Abu Al-Haija et
Qasem Abu Al-Haija,
Ibrahim Marouf,
Mohammad M. Asad,
Kamal Al Nasr
International Journal on Smart Sensing and Intelligent Systems
, Volume 12 , ISSUE 1, 1–9
Article | 05-June-2013
RFID is a generic item which uses radio waves to automatically identify objects and people. This paper presents a flexible RFID interrogator system architecture which could support various kinds of RFID standards and realizes a UHF RFID interrogator based on the EPC global C1G2 standard in details. The proposed interrogator system consists of RF analog front end, digital baseband and MAC layer. The system circuit contains a FPGA chip and peripheral circuits. NiosII core as a controller is
Liyan Xu,
Lingling Sun,
Xiaoping Hu
International Journal on Smart Sensing and Intelligent Systems, Volume 6 , ISSUE 3, 1012–1031
Research Article | 27-December-2017
interface between the analog part and the software updating system is integrated in an analog-digital PCB including a FPGA, 6 analog-to-digital converters and 62 digital-to-analog converters. This paper describes the realization of each part of the breadboard system and presents experimental validation results of the whole predistortion module.
B. Mulliez,
E. Moutaye,
H. Tap,
L Gatet,
F. Gizard
International Journal on Smart Sensing and Intelligent Systems, Volume 7 , ISSUE 1, 400–420
Article | 05-June-2013
built by FPGA chip. Kinematics and kinetics of the cardan mechanism are analyzed for attitude control. Complex feedback PD controller is applied to control the attitude of the cardan mechanism as large mass equipment base would influence control performance. This controller contains real time gravity compensation, desired acceleration compensation and velocity feed forward compensation. The experiments show that the cardan mechanism designed in this paper has good performance by adopting Complex
Zhijun Zhao,
Jingdong Zhao,
Hong Liu,
Zhi Zhang
International Journal on Smart Sensing and Intelligent Systems, Volume 6 , ISSUE 3, 1283–1297
Research Article | 01-September-2017
. In the proposed system, the above methodology has been extended to implement a memory efficient FPGA-hardware based Network Intrusion Detection System (NIDS) to speed up network processing. The pattern matching in Intrusion Detection Systems (IDS) is done using SNORT to find the pattern of intrusions. A Finite State Machine (FSM) based Processing Elements (PE) unit to achieve minimum number of states for pattern matching and bit wise early intrusion detection to increase the throughput by
M.Anto Bennet,
S. Sankaranarayanan,
M. Deepika,
N. Nanthini,
S. Bhuvaneshwari,
M. Priyanka
International Journal on Smart Sensing and Intelligent Systems, Volume 10 , ISSUE 5, 101–122
Article | 05-June-2013
In this paper, a Field Programmable Gate Array (FPGA) based embedded system has been proposed for non-invasive detection of hemoglobin in blood using photoplethysmography. Photoplethysmography (PPG) is a non-invasive and low-cost optical technique that can be used to detect blood volume changes in the micro-vascular bed of tissue. Our investigations revealed that volume of water present in blood considerably affects the reading of the concentration of blood hemoglobin. In our current work, the
Chetan Sharma,
Sachin Kumar,
Anshul Bhargava,
Shubhajit Roy Chowdhury
International Journal on Smart Sensing and Intelligent Systems, Volume 6 , ISSUE 3, 1267–1282
Article | 01-September-2016
(LBP) and E-HOG is the novel structure of pedestrian detection system. The Sobel operator gives the sliding step of Uniform LBP detection window, without using the results of LBP detection window. Through this operation, the detection speed will be improved. Second, the vehicle equipment of pedestrian detection is self-developed using FPGA as core devices. Third, E-HOG IP, which is promoted based on the HOG, can extract pedestrian or other objects feature. Without sacrifice of accuracy, this
Ai-ying Guo,
Mei-hua Xu,
Feng Ran,
Qi Wang
International Journal on Smart Sensing and Intelligent Systems, Volume 9 , ISSUE 3, 1592–1613